Technique for Efficient Evaluation of SRAM Timing Failure
نویسندگان
چکیده
منابع مشابه
A Technique for Efficient Evaluation of SRAM Timing Failure
This paper presents a technique to evaluate the timing variation of SRAM. Specifically, a method called loop flattening that reduces the evaluation of the timing statistics in the complex, highly structured circuit to that of a single chain of component circuits is justified. To then very quickly evaluate the timing delay of a single chain, a statistical method based on Importance Sampling augm...
متن کاملAn area-efficient dual replica-bitline delay technique for process-variation-tolerant low voltage SRAM sense amplifier timing
A novel area-efficient dual replica-bitline delay technique is proposed in this brief to improve process-variation-tolerance of low voltage SRAM application. This strategy suppresses the timing variation by adding one another replica-bitline and introducing novel replica cell which has the same size as conventional. Simulation results in TSMC 65nm LP technology show that more than 32.3% timing ...
متن کاملnano-rods zno as an efficient catalyst for the synthesis of chromene phosphonates, direct amidation and formylation of amines
چکیده ندارد.
An efficient technique for solving systems of integral equations
In this paper, the wavelet method based on the Chebyshev polynomials of the second kind is introduced and used to solve systems of integral equations. Operational matrices of integration, product, and derivative are obtained for the second kind Chebyshev wavelets which will be used to convert the system of integral equations into a system of algebraic equations. Also, the error is analyzed and ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
سال: 2013
ISSN: 1063-8210,1557-9999
DOI: 10.1109/tvlsi.2012.2212254